Instructor:
Dr. David Poplawski
Email: pop [AT] mtu [DOT] edu
Phone: 487-2331
Office: Rekhi 208
Office Hours: MTWR 2-3pm, other times by appointment
Course Text and Reference Materials:
Digital Design and Computer Architecture,
by Harris and Harris
Mars Web site
JLS (Logic Simulator)
Grading:
Policies:
-
I encourage you to work study problems with other people, but make sure you
understand how to solve all the problems as you will have to do similar
problems by yourself on the quiz, the midterms and the final exam.
-
You may work in pairs or alone on the lab assignments (no threesomes or more).
If you pair up, submit one version with both your names on it, even if you are
in different sections.
If you pair up with someone in the other section, be sure to put your section
numbers after your names.
-
Lab assignments must be submitted by the due date and time indicated on the
assignment.
Late assignments will receive NO credit.
-
If you miss an exam with a good reason (I decide if your reason is a good one),
then the score you get on the next exam will be the score you will be given for
the missing one.
If you don't have a good reason you will get a 0 on the exam.
-
You must take the final exam at the officially scheduled time.
You will not pass the course if you do not take the final exam.
-
If you come to me with a problem meeting a deadline or taking an exam BEFORE it
is due I am pretty reasonable about deciding if an excuse is a good one.
If you come to me afterwards I'll be very skeptical and will almost certainly
require clear, written proof of whatever caused the problem.
Lab Assignments:
Lab 1
(tentatively due 9/15)
Lab 2
(tentatively due 9/29)
Lab 3
(tentatively due 10/13)
Lab 4
(tentatively due 10/27)
Lab 5
(tentatively due 11/10)
Lab 6
(tentatively due 12/1)
Lab 7
(tentatively due 12/12)
Quiz/Exam Info and Solutions:
|
Syllabus:
| Week |
Topic |
Readings |
| 1 |
Introduction Numeric Encodings |
Sections 1.1-1.4, 5.3 |
| 2,3,4 |
Assembly Language |
Sections 6.1-6.7 |
| 5 |
Boolean Algebra Combinational Logic |
Sections 2.1-2.6, 2.8, 2.9 |
| 6 |
Sequential Logic State Machines |
Sections 3.1, 3.2, 3.4 |
| 7 |
Arithmetic Circuits Memory |
Sections 5.1, 5.2, 5.5 |
| 8 |
Microarchitecture (One Cycle) |
Sections 7.1,7.3 |
| 9 |
Performance |
Sections 7.2, 7.3.4 |
| 10 |
Microarchitecture (Multicycle) |
Section 7.4 |
| 11 |
Memory Systems, Cache |
Sections 8.1-8.3 |
| 12 |
Memory Systems (Cache) |
Section 8.3 |
| 13 |
Memory Systems (Virtual Memory) |
Section 8.3 |
| 14 |
I/O |
Section 8.5 |
Study problems and solutions:
Some useful applets:
Clock Speed - Cycle Time Converter
CMOS Gate Demo
Cache Simulation
Other Stuff:
Units and Terms
Useful programs in /classes/cs3421/bin
Miscellaneous Interesting Links
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