Your task is to complete the CPU implementation begun in lab 5. This includes circuitry to execute the remaining instructions in the instruction set, and circuitry to fetch instructions and increment the pc.
You must have a multi-cycle implementation. This can be as simple as fetching the instruction and incrementing the PC in one cycle, then decoding and executing the instruction in the next cycle using the circuitry you already have. This will give you a very simple two-state state machine. However, you may want to do "better" (see below).
You must have a memory element in which the program being simulated is stored. It MUST be named "MEMORY" (all upper case). It MUST have an access time of 2000. It CANNOT be in a subcircuit.
You MUST have a program counter named "PC" (all upper case) with initial value 0. It CANNOT be in a subcircuit. The CPU.jls file already has this element - don't delete it.
Use "named wires" with nice names to avoid long wires in the diagram. Feel free to define subcircuits as you see fit to make your circuit easier to understand (except don't put the items above in any subcircuits).
Don't worry about minimizing propagation delay in order to make the cycle time as small as possible. I'm more interested in getting a correctly working slow machine than a fast machine that doesn't work. However do try to set the clock cycle time reasonably small given the circuitry you have. Do not change the propagation delays of any elements except DELAY elements.
I would advise creating short test memory files that test just a few instructions at a time.
The following tools are in /classes/cs3421/common/lab5.
java Asm asmfile memoryfile
where asmfile is your assembly language program file name and memoryfile is the name of the memory file you want to generate.
Here is a sample assembly language file:
add $1,$0,$0 # count = 0 load $2,limit # get limit sub $3,$3,$3 # sum = 0 loop: add $3,$3,$1 # add count to sum addi $1,$1,1 # add one to count ble $1,$2,loop # loop if count <= limit store $3,ans # store answer halt limit: word 10 ans: word 0 # should become 55
(notice that the "word" assembler directive does NOT have a period)
sim memoryfilewhere memoryfile is the name of a memory file. It will run the program in the memory file and print out the final register values and all changed memory words. The printed pc value is the address of the last instruction executed (hopefully "halt").
A useful feature of this simulator is the "trace" instruction. It is not an instruction you have to implement in your CPU, but if you put the simple instruction "trace" (with no operands) in your assembly file, assemble and run it, this simulator will print out the PC, accumulator and index register at the time the trace instruction is executed.
Use this feature when you are writing test programs for your circuit. However, you must delete the trace instructions when you try the test program with your circuit as the trace instruction will look like a halt instruction to your CPU.
Before you submit, make sure you have your name (and your partner's name if you have one) on your circuit.
Do not change the propagation delays of any elements except DELAY elements.
Also, make sure your program counter is called "PC" (all upper case) and your memory element is called "MEMORY" (all upper case), and that both are not in any subcircuits. If you don't you will get 0 on this assignment.
Use the submit command to electronically submit your "CPU.jls" file to "cs3421", assignment "lab6" by the due date.
You must submit your file by the due date/time in order to receive credit.
The students who submit the three fastest working CPU circuits will be excused from the taking final exam. I will write a test program that will be used to measure the speed of your circuit, but you will not get to see it. You can assume it will use every one of the instructions.